Static Call Graph for image .\Objects\U1+S5+E1-GD32470Z.axf

Function Pointers

• ADC_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• BusFault_Handler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• CAN0_EWMC_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• CAN0_RX0_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• CAN0_RX1_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• CAN0_TX_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• CAN1_EWMC_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• CAN1_RX0_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• CAN1_RX1_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• CAN1_TX_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• DCI_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• DMA0_Channel0_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• DMA0_Channel1_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• DMA0_Channel2_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• DMA0_Channel3_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• DMA0_Channel4_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• DMA0_Channel5_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• DMA0_Channel6_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• DMA0_Channel7_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• DMA1_Channel0_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• DMA1_Channel1_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• DMA1_Channel2_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• DMA1_Channel3_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• DMA1_Channel4_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• DMA1_Channel5_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• DMA1_Channel6_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• DMA1_Channel7_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• DebugMon_Handler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• ENET_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• ENET_WKUP_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• EXMC_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• EXTI0_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• EXTI10_15_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• EXTI1_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• EXTI2_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• EXTI3_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• EXTI4_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• EXTI5_9_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• FMC_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• FPU_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• HardFault_Handler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• I2C0_ER_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• I2C0_EV_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• I2C1_ER_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• I2C1_EV_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• I2C2_ER_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• I2C2_EV_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• IPA_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• LVD_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• MemManage_Handler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• NMI_Handler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• PendSV_Handler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• RCU_CTC_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• RTC_Alarm_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• RTC_WKUP_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• Reset_Handler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• SDIO_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• SPI0_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• SPI1_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• SPI2_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• SPI3_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• SPI4_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• SPI5_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• SVC_Handler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• SysTick_Handler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• SystemInit from system_gd32f4xx.o(i.SystemInit) referenced from startup_gd32f450.o(.text)
• TAMPER_STAMP_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• TIMER0_BRK_TIMER8_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• TIMER0_Channel_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• TIMER0_TRG_CMT_TIMER10_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• TIMER0_UP_TIMER9_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• TIMER1_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• TIMER2_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• TIMER3_IRQHandler from main.o(i.TIMER3_IRQHandler) referenced from startup_gd32f450.o(RESET)
• TIMER4_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• TIMER5_DAC_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• TIMER6_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• TIMER7_BRK_TIMER11_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• TIMER7_Channel_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• TIMER7_TRG_CMT_TIMER13_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• TIMER7_UP_TIMER12_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• TLI_ER_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• TLI_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• TRNG_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• UART3_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• UART4_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• UART6_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• UART7_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• USART0_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• USART1_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• USART2_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• USART5_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• USBFS_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• USBFS_WKUP_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• USBHS_EP1_In_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• USBHS_EP1_Out_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• USBHS_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• USBHS_WKUP_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• UsageFault_Handler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• WWDGT_IRQHandler from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
• __main from entry.o(.ARM.Collect$$$$00000000) referenced from startup_gd32f450.o(.text)
• main from main.o(i.main) referenced from entry9a.o(.ARM.Collect$$$$0000000B)

Global Symbols

__main (Thumb, 0 bytes, Stack size unknown bytes, entry.o(.ARM.Collect$$$$00000000))
[Address Reference Count : 1]

• startup_gd32f450.o(.text)

_main_stk (Thumb, 0 bytes, Stack size unknown bytes, entry2.o(.ARM.Collect$$$$00000001))

_main_scatterload (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))

[Calls]

• >>   __scatterload

__main_after_scatterload (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))

[Called By]

• >>   __scatterload

_main_clock (Thumb, 0 bytes, Stack size unknown bytes, entry7b.o(.ARM.Collect$$$$00000008))

_main_cpp_init (Thumb, 0 bytes, Stack size unknown bytes, entry8b.o(.ARM.Collect$$$$0000000A))

_main_init (Thumb, 0 bytes, Stack size unknown bytes, entry9a.o(.ARM.Collect$$$$0000000B))

__rt_lib_shutdown_fini (Thumb, 0 bytes, Stack size unknown bytes, entry12b.o(.ARM.Collect$$$$0000000E))

__rt_final_cpp (Thumb, 0 bytes, Stack size unknown bytes, entry10a.o(.ARM.Collect$$$$0000000F))

__rt_final_exit (Thumb, 0 bytes, Stack size unknown bytes, entry11a.o(.ARM.Collect$$$$00000011))

Reset_Handler (Thumb, 8 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

NMI_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))

[Calls]

• >>   NMI_Handler

• >>   NMI_Handler

• startup_gd32f450.o(RESET)

HardFault_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))

[Calls]

• >>   HardFault_Handler

• >>   HardFault_Handler

• startup_gd32f450.o(RESET)

MemManage_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))

[Calls]

• >>   MemManage_Handler

• >>   MemManage_Handler

• startup_gd32f450.o(RESET)

BusFault_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))

[Calls]

• >>   BusFault_Handler

• >>   BusFault_Handler

• startup_gd32f450.o(RESET)

UsageFault_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))

[Calls]

• >>   UsageFault_Handler

• >>   UsageFault_Handler

• startup_gd32f450.o(RESET)

SVC_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))

[Calls]

• >>   SVC_Handler

• >>   SVC_Handler

• startup_gd32f450.o(RESET)

DebugMon_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))

[Calls]

• >>   DebugMon_Handler

• >>   DebugMon_Handler

• startup_gd32f450.o(RESET)

PendSV_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))

[Calls]

• >>   PendSV_Handler

• >>   PendSV_Handler

• startup_gd32f450.o(RESET)

SysTick_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))

[Calls]

• >>   SysTick_Handler

• >>   SysTick_Handler

• startup_gd32f450.o(RESET)

ADC_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))

[Calls]

• >>   ADC_IRQHandler

• >>   ADC_IRQHandler

• startup_gd32f450.o(RESET)

CAN0_EWMC_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

CAN0_RX0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

CAN0_RX1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

CAN0_TX_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

CAN1_EWMC_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

CAN1_RX0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

CAN1_RX1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

CAN1_TX_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

DCI_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

DMA0_Channel0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

DMA0_Channel1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

DMA0_Channel2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

DMA0_Channel3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

DMA0_Channel4_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

DMA0_Channel5_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

DMA0_Channel6_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

DMA0_Channel7_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

DMA1_Channel0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

DMA1_Channel1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

DMA1_Channel2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

DMA1_Channel3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

DMA1_Channel4_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

DMA1_Channel5_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

DMA1_Channel6_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

DMA1_Channel7_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

ENET_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

ENET_WKUP_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

EXMC_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

EXTI0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

EXTI10_15_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

EXTI1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

EXTI2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

EXTI3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

EXTI4_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

EXTI5_9_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

FMC_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

FPU_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

I2C0_ER_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

I2C0_EV_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

I2C1_ER_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

I2C1_EV_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

I2C2_ER_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

I2C2_EV_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

IPA_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

LVD_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

RCU_CTC_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

RTC_Alarm_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

RTC_WKUP_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

SDIO_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

SPI0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

SPI1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

SPI2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

SPI3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

SPI4_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

SPI5_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

TAMPER_STAMP_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

TIMER0_BRK_TIMER8_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

TIMER0_Channel_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

TIMER0_TRG_CMT_TIMER10_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

TIMER0_UP_TIMER9_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

TIMER1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

TIMER2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

TIMER4_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

TIMER5_DAC_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

TIMER6_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

TIMER7_BRK_TIMER11_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

TIMER7_Channel_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

TIMER7_TRG_CMT_TIMER13_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

TIMER7_UP_TIMER12_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

TLI_ER_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

TLI_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

TRNG_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

UART3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

UART4_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

UART6_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

UART7_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

USART0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

USART1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

USART2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

USART5_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

USBFS_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

USBFS_WKUP_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

USBHS_EP1_In_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

USBHS_EP1_Out_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

USBHS_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

USBHS_WKUP_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

WWDGT_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
[Address Reference Count : 1]

• startup_gd32f450.o(RESET)

__scatterload (Thumb, 28 bytes, Stack size 0 bytes, init.o(.text))

[Calls]

• >>   __main_after_scatterload

• >>   _main_scatterload

__scatterload_rt2 (Thumb, 0 bytes, Stack size 0 bytes, init.o(.text), UNUSED)

CalulateCRC (Thumb, 150 bytes, Stack size 40 bytes, s5.o(i.CalulateCRC))

[Stack]

• Max Depth = 120
• Call Chain = CalulateCRC ⇒ SetBitMask ⇒ i2c_delay_read ⇒ i2c_flag_get

• >>   SetBitMask
• >>   ClearBitMask
• >>   i2c_delay_write
• >>   i2c_delay_read
• >>   i2c_delay_byte_write

• >>   PcdSelect
• >>   PcdRead

ClearBitMask (Thumb, 54 bytes, Stack size 32 bytes, s5.o(i.ClearBitMask))

[Stack]

• Max Depth = 80
• Call Chain = ClearBitMask ⇒ i2c_delay_read ⇒ i2c_flag_get

• >>   i2c_delay_read
• >>   i2c_delay_byte_write

• >>   PcdSelect
• >>   PcdReset
• >>   PcdRequest
• >>   PcdComMS523
• >>   PcdAnticoll
• >>   PcdAntennaOff
• >>   CalulateCRC

Init_MFRC522 (Thumb, 50 bytes, Stack size 16 bytes, s5.o(i.Init_MFRC522))

[Stack]

• Max Depth = 136
• Call Chain = Init_MFRC522 ⇒ M500PcdConfigISOType ⇒ PcdAntennaOn ⇒ SetBitMask ⇒ i2c_delay_read ⇒ i2c_flag_get

• >>   delay_s5_ms
• >>   PcdReset
• >>   PcdAntennaOn
• >>   PcdAntennaOff
• >>   M500PcdConfigISOType

• >>   s5_init

M500PcdConfigISOType (Thumb, 136 bytes, Stack size 16 bytes, s5.o(i.M500PcdConfigISOType))

[Stack]

• Max Depth = 120
• Call Chain = M500PcdConfigISOType ⇒ PcdAntennaOn ⇒ SetBitMask ⇒ i2c_delay_read ⇒ i2c_flag_get

• >>   PcdAntennaOn
• >>   MFRC_Delay
• >>   i2c_delay_byte_write

• >>   Init_MFRC522

MFRC_Delay (Thumb, 26 bytes, Stack size 0 bytes, s5.o(i.MFRC_Delay))

[Called By]

• >>   PcdReset
• >>   M500PcdConfigISOType

PcdAntennaOff (Thumb, 20 bytes, Stack size 16 bytes, s5.o(i.PcdAntennaOff))

[Stack]

• Max Depth = 96
• Call Chain = PcdAntennaOff ⇒ ClearBitMask ⇒ i2c_delay_read ⇒ i2c_flag_get

• >>   ClearBitMask

• >>   Init_MFRC522

PcdAntennaOn (Thumb, 46 bytes, Stack size 24 bytes, s5.o(i.PcdAntennaOn))

[Stack]

• Max Depth = 104
• Call Chain = PcdAntennaOn ⇒ SetBitMask ⇒ i2c_delay_read ⇒ i2c_flag_get

• >>   SetBitMask
• >>   i2c_delay_read

• >>   M500PcdConfigISOType
• >>   Init_MFRC522

PcdAnticoll (Thumb, 144 bytes, Stack size 64 bytes, s5.o(i.PcdAnticoll))

[Stack]

• Max Depth = 200
• Call Chain = PcdAnticoll ⇒ PcdComMS523 ⇒ SetBitMask ⇒ i2c_delay_read ⇒ i2c_flag_get

• >>   SetBitMask
• >>   PcdComMS523
• >>   ClearBitMask
• >>   i2c_delay_byte_write

• >>   s5_detect

PcdAuthState (Thumb, 136 bytes, Stack size 80 bytes, s5.o(i.PcdAuthState))

[Stack]

• Max Depth = 216
• Call Chain = PcdAuthState ⇒ PcdComMS523 ⇒ SetBitMask ⇒ i2c_delay_read ⇒ i2c_flag_get

• >>   PcdComMS523
• >>   i2c_delay_read

• >>   s5_verify

PcdComMS523 (Thumb, 420 bytes, Stack size 56 bytes, s5.o(i.PcdComMS523))

[Stack]

• Max Depth = 136
• Call Chain = PcdComMS523 ⇒ SetBitMask ⇒ i2c_delay_read ⇒ i2c_flag_get

• >>   SetBitMask
• >>   ClearBitMask
• >>   i2c_delay_write
• >>   i2c_delay_read
• >>   i2c_delay_byte_write

• >>   PcdSelect
• >>   PcdRequest
• >>   PcdRead
• >>   PcdAuthState
• >>   PcdAnticoll

PcdRead (Thumb, 108 bytes, Stack size 64 bytes, s5.o(i.PcdRead))

[Stack]

• Max Depth = 200
• Call Chain = PcdRead ⇒ PcdComMS523 ⇒ SetBitMask ⇒ i2c_delay_read ⇒ i2c_flag_get

• >>   PcdComMS523
• >>   CalulateCRC

• >>   s5_read_data

PcdRequest (Thumb, 114 bytes, Stack size 64 bytes, s5.o(i.PcdRequest))

[Stack]

• Max Depth = 200
• Call Chain = PcdRequest ⇒ PcdComMS523 ⇒ SetBitMask ⇒ i2c_delay_read ⇒ i2c_flag_get

• >>   SetBitMask
• >>   PcdComMS523
• >>   ClearBitMask
• >>   i2c_delay_byte_write

• >>   s5_detect

PcdReset (Thumb, 124 bytes, Stack size 16 bytes, s5.o(i.PcdReset))

[Stack]

• Max Depth = 96
• Call Chain = PcdReset ⇒ ClearBitMask ⇒ i2c_delay_read ⇒ i2c_flag_get

• >>   MFRC_Delay
• >>   ClearBitMask
• >>   i2c_delay_byte_write

• >>   Init_MFRC522

PcdSelect (Thumb, 142 bytes, Stack size 64 bytes, s5.o(i.PcdSelect))

[Stack]

• Max Depth = 200
• Call Chain = PcdSelect ⇒ PcdComMS523 ⇒ SetBitMask ⇒ i2c_delay_read ⇒ i2c_flag_get

• >>   PcdComMS523
• >>   ClearBitMask
• >>   CalulateCRC

• >>   s5_detect

SetBitMask (Thumb, 54 bytes, Stack size 32 bytes, s5.o(i.SetBitMask))

[Stack]

• Max Depth = 80
• Call Chain = SetBitMask ⇒ i2c_delay_read ⇒ i2c_flag_get

• >>   i2c_delay_read
• >>   i2c_delay_byte_write

• >>   PcdRequest
• >>   PcdComMS523
• >>   PcdAnticoll
• >>   PcdAntennaOn
• >>   CalulateCRC

SystemInit (Thumb, 194 bytes, Stack size 8 bytes, system_gd32f4xx.o(i.SystemInit))

[Stack]

• Max Depth = 16
• Call Chain = SystemInit ⇒ system_clock_config

• >>   system_clock_config

• startup_gd32f450.o(.text)

TIMER3_IRQHandler (Thumb, 80 bytes, Stack size 8 bytes, main.o(i.TIMER3_IRQHandler))

[Stack]

• Max Depth = 8
• Call Chain = TIMER3_IRQHandler

• >>   timer_interrupt_flag_get
• >>   timer_interrupt_flag_clear

• startup_gd32f450.o(RESET)

__scatterload_copy (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_copy), UNUSED)

__scatterload_null (Thumb, 2 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_null), UNUSED)

__scatterload_zeroinit (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_zeroinit), UNUSED)

delay_s5_ms (Thumb, 28 bytes, Stack size 0 bytes, s5.o(i.delay_s5_ms))

[Called By]

• >>   Init_MFRC522

e1_digital_display (Thumb, 68 bytes, Stack size 32 bytes, e1.o(i.e1_digital_display))

[Stack]

• Max Depth = 88
• Call Chain = e1_digital_display ⇒ ht16k33_display_data ⇒ i2c_cmd_write ⇒ i2c_flag_get

• >>   ht16k33_display_data

• >>   main

e1_init (Thumb, 168 bytes, Stack size 32 bytes, e1.o(i.e1_init))

[Stack]

• Max Depth = 96
• Call Chain = e1_init ⇒ pca9685_init ⇒ set_pca9685_pwm_off ⇒ i2c_byte_write ⇒ i2c_flag_get

• >>   pca9685_init
• >>   ht16k33_init
• >>   i2c_addr_poll

• >>   main

gd_eval_com_init (Thumb, 164 bytes, Stack size 16 bytes, gd32f450z_eval.o(i.gd_eval_com_init))

[Stack]

• Max Depth = 132
• Call Chain = gd_eval_com_init ⇒ usart_baudrate_set ⇒ rcu_clock_freq_get

• >>   gpio_output_options_set
• >>   gpio_mode_set
• >>   gpio_af_set
• >>   rcu_periph_clock_enable
• >>   usart_transmit_config
• >>   usart_receive_config
• >>   usart_enable
• >>   usart_deinit
• >>   usart_baudrate_set

• >>   main

get_board_address (Thumb, 78 bytes, Stack size 24 bytes, i2c.o(i.get_board_address))

[Stack]

• Max Depth = 56
• Call Chain = get_board_address ⇒ i2c_addr_poll ⇒ i2c_flag_get

• >>   i2c_addr_poll

• >>   s5_init

gpio_af_set (Thumb, 94 bytes, Stack size 20 bytes, gd32f4xx_gpio.o(i.gpio_af_set))

[Stack]

• Max Depth = 20
• Call Chain = gpio_af_set

• >>   i2c2_gpio_config
• >>   i2c1_gpio_config
• >>   i2c0_gpio_config
• >>   gd_eval_com_init

gpio_mode_set (Thumb, 78 bytes, Stack size 20 bytes, gd32f4xx_gpio.o(i.gpio_mode_set))

[Stack]

• Max Depth = 20
• Call Chain = gpio_mode_set

• >>   i2c2_gpio_config
• >>   i2c1_gpio_config
• >>   i2c0_gpio_config
• >>   gd_eval_com_init

gpio_output_options_set (Thumb, 66 bytes, Stack size 20 bytes, gd32f4xx_gpio.o(i.gpio_output_options_set))

[Stack]

• Max Depth = 20
• Call Chain = gpio_output_options_set

• >>   i2c2_gpio_config
• >>   i2c1_gpio_config
• >>   i2c0_gpio_config
• >>   gd_eval_com_init

ht16k33_display_data (Thumb, 192 bytes, Stack size 24 bytes, e1.o(i.ht16k33_display_data))

[Stack]

• Max Depth = 56
• Call Chain = ht16k33_display_data ⇒ i2c_cmd_write ⇒ i2c_flag_get

• >>   i2c_cmd_write
• >>   i2c_byte_write

• >>   e1_digital_display

ht16k33_display_off (Thumb, 114 bytes, Stack size 16 bytes, e1.o(i.ht16k33_display_off))

[Stack]

• Max Depth = 48
• Call Chain = ht16k33_display_off ⇒ i2c_cmd_write ⇒ i2c_flag_get

• >>   i2c_cmd_write
• >>   i2c_byte_write

• >>   ht16k33_init

ht16k33_init (Thumb, 26 bytes, Stack size 16 bytes, e1.o(i.ht16k33_init))

[Stack]

• Max Depth = 64
• Call Chain = ht16k33_init ⇒ ht16k33_display_off ⇒ i2c_cmd_write ⇒ i2c_flag_get

• >>   ht16k33_display_off
• >>   i2c_cmd_write

• >>   e1_init

i2c0_config (Thumb, 50 bytes, Stack size 8 bytes, i2c.o(i.i2c0_config))

[Stack]

• Max Depth = 132
• Call Chain = i2c0_config ⇒ i2c_clock_config ⇒ rcu_clock_freq_get

• >>   i2c_mode_addr_config
• >>   i2c_enable
• >>   i2c_clock_config
• >>   i2c_ack_config
• >>   rcu_periph_clock_enable

• >>   init_i2c

i2c0_gpio_config (Thumb, 92 bytes, Stack size 8 bytes, i2c.o(i.i2c0_gpio_config))

[Stack]

• Max Depth = 28
• Call Chain = i2c0_gpio_config ⇒ gpio_output_options_set

• >>   gpio_output_options_set
• >>   gpio_mode_set
• >>   gpio_af_set
• >>   rcu_periph_clock_enable

• >>   init_i2c

i2c1_config (Thumb, 50 bytes, Stack size 8 bytes, i2c.o(i.i2c1_config))

[Stack]

• Max Depth = 132
• Call Chain = i2c1_config ⇒ i2c_clock_config ⇒ rcu_clock_freq_get

• >>   i2c_mode_addr_config
• >>   i2c_enable
• >>   i2c_clock_config
• >>   i2c_ack_config
• >>   rcu_periph_clock_enable

• >>   init_i2c

i2c1_gpio_config (Thumb, 80 bytes, Stack size 8 bytes, i2c.o(i.i2c1_gpio_config))

[Stack]

• Max Depth = 28
• Call Chain = i2c1_gpio_config ⇒ gpio_output_options_set

• >>   gpio_output_options_set
• >>   gpio_mode_set
• >>   gpio_af_set
• >>   rcu_periph_clock_enable

• >>   init_i2c

i2c2_config (Thumb, 50 bytes, Stack size 8 bytes, i2c2.o(i.i2c2_config))

[Stack]

• Max Depth = 132
• Call Chain = i2c2_config ⇒ i2c_clock_config ⇒ rcu_clock_freq_get

• >>   i2c_mode_addr_config
• >>   i2c_enable
• >>   i2c_clock_config
• >>   i2c_ack_config
• >>   rcu_periph_clock_enable

• >>   init_i2c

i2c2_gpio_config (Thumb, 100 bytes, Stack size 8 bytes, i2c2.o(i.i2c2_gpio_config))

[Stack]

• Max Depth = 28
• Call Chain = i2c2_gpio_config ⇒ gpio_output_options_set

• >>   gpio_output_options_set
• >>   gpio_mode_set
• >>   gpio_af_set
• >>   rcu_periph_clock_enable

• >>   init_i2c

i2c_ack_config (Thumb, 16 bytes, Stack size 0 bytes, gd32f4xx_i2c.o(i.i2c_ack_config))

[Called By]

• >>   i2c2_config
• >>   i2c_delay_read
• >>   i2c1_config
• >>   i2c0_config

i2c_ackpos_config (Thumb, 16 bytes, Stack size 0 bytes, gd32f4xx_i2c.o(i.i2c_ackpos_config))

[Called By]

• >>   i2c_delay_read

i2c_addr_poll (Thumb, 130 bytes, Stack size 24 bytes, i2c.o(i.i2c_addr_poll))

[Stack]

• Max Depth = 32
• Call Chain = i2c_addr_poll ⇒ i2c_flag_get

• >>   i2c_stop_on_bus
• >>   i2c_start_on_bus
• >>   i2c_master_addressing
• >>   i2c_flag_get

• >>   get_board_address
• >>   e1_init

i2c_byte_write (Thumb, 196 bytes, Stack size 24 bytes, i2c.o(i.i2c_byte_write))

[Stack]

• Max Depth = 32
• Call Chain = i2c_byte_write ⇒ i2c_flag_get

• >>   i2c_stop_on_bus
• >>   i2c_start_on_bus
• >>   i2c_master_addressing
• >>   i2c_flag_get
• >>   i2c_flag_clear
• >>   i2c_data_transmit

• >>   set_pca9685_pwm_off
• >>   ht16k33_display_off
• >>   ht16k33_display_data

i2c_clock_config (Thumb, 216 bytes, Stack size 40 bytes, gd32f4xx_i2c.o(i.i2c_clock_config))

[Stack]

• Max Depth = 124
• Call Chain = i2c_clock_config ⇒ rcu_clock_freq_get

• >>   rcu_clock_freq_get

• >>   i2c2_config
• >>   i2c1_config
• >>   i2c0_config

i2c_cmd_write (Thumb, 170 bytes, Stack size 24 bytes, i2c.o(i.i2c_cmd_write))

[Stack]

• Max Depth = 32
• Call Chain = i2c_cmd_write ⇒ i2c_flag_get

• >>   i2c_stop_on_bus
• >>   i2c_start_on_bus
• >>   i2c_master_addressing
• >>   i2c_flag_get
• >>   i2c_flag_clear
• >>   i2c_data_transmit

• >>   ht16k33_init
• >>   ht16k33_display_off
• >>   ht16k33_display_data

i2c_data_receive (Thumb, 8 bytes, Stack size 0 bytes, gd32f4xx_i2c.o(i.i2c_data_receive))

[Called By]

• >>   i2c_delay_read

i2c_data_transmit (Thumb, 6 bytes, Stack size 0 bytes, gd32f4xx_i2c.o(i.i2c_data_transmit))

[Called By]

• >>   i2c_delay_write
• >>   i2c_delay_read
• >>   i2c_delay_byte_write
• >>   i2c_cmd_write
• >>   i2c_byte_write

i2c_delay (Thumb, 12 bytes, Stack size 0 bytes, i2c.o(i.i2c_delay))

[Called By]

• >>   i2c_delay_write
• >>   i2c_delay_read
• >>   i2c_delay_byte_write

i2c_delay_byte_write (Thumb, 278 bytes, Stack size 32 bytes, i2c.o(i.i2c_delay_byte_write))

[Stack]

• Max Depth = 40
• Call Chain = i2c_delay_byte_write ⇒ i2c_flag_get

• >>   i2c_stop_on_bus
• >>   i2c_start_on_bus
• >>   i2c_master_addressing
• >>   i2c_flag_get
• >>   i2c_flag_clear
• >>   i2c_data_transmit
• >>   i2c_delay

• >>   SetBitMask
• >>   PcdReset
• >>   PcdRequest
• >>   PcdComMS523
• >>   PcdAnticoll
• >>   M500PcdConfigISOType
• >>   ClearBitMask
• >>   CalulateCRC
• >>   pca9685_init

i2c_delay_read (Thumb, 454 bytes, Stack size 40 bytes, i2c.o(i.i2c_delay_read))

[Stack]

• Max Depth = 48
• Call Chain = i2c_delay_read ⇒ i2c_flag_get

• >>   i2c_stop_on_bus
• >>   i2c_start_on_bus
• >>   i2c_master_addressing
• >>   i2c_flag_get
• >>   i2c_flag_clear
• >>   i2c_enable
• >>   i2c_data_transmit
• >>   i2c_data_receive
• >>   i2c_ackpos_config
• >>   i2c_ack_config
• >>   i2c_delay

• >>   SetBitMask
• >>   PcdComMS523
• >>   PcdAuthState
• >>   PcdAntennaOn
• >>   ClearBitMask
• >>   CalulateCRC

i2c_delay_write (Thumb, 294 bytes, Stack size 32 bytes, i2c.o(i.i2c_delay_write))

[Stack]

• Max Depth = 40
• Call Chain = i2c_delay_write ⇒ i2c_flag_get

• >>   i2c_stop_on_bus
• >>   i2c_start_on_bus
• >>   i2c_master_addressing
• >>   i2c_flag_get
• >>   i2c_flag_clear
• >>   i2c_data_transmit
• >>   i2c_delay

• >>   PcdComMS523
• >>   CalulateCRC

i2c_enable (Thumb, 10 bytes, Stack size 0 bytes, gd32f4xx_i2c.o(i.i2c_enable))

[Called By]

• >>   i2c2_config
• >>   i2c_delay_read
• >>   i2c1_config
• >>   i2c0_config

i2c_flag_clear (Thumb, 40 bytes, Stack size 8 bytes, gd32f4xx_i2c.o(i.i2c_flag_clear))

[Stack]

• Max Depth = 8
• Call Chain = i2c_flag_clear

• >>   i2c_delay_write
• >>   i2c_delay_read
• >>   i2c_delay_byte_write
• >>   i2c_cmd_write
• >>   i2c_byte_write

i2c_flag_get (Thumb, 30 bytes, Stack size 8 bytes, gd32f4xx_i2c.o(i.i2c_flag_get))

[Stack]

• Max Depth = 8
• Call Chain = i2c_flag_get

• >>   i2c_delay_write
• >>   i2c_delay_read
• >>   i2c_delay_byte_write
• >>   i2c_cmd_write
• >>   i2c_byte_write
• >>   i2c_addr_poll

i2c_master_addressing (Thumb, 20 bytes, Stack size 0 bytes, gd32f4xx_i2c.o(i.i2c_master_addressing))

[Called By]

• >>   i2c_delay_write
• >>   i2c_delay_read
• >>   i2c_delay_byte_write
• >>   i2c_cmd_write
• >>   i2c_byte_write
• >>   i2c_addr_poll

i2c_mode_addr_config (Thumb, 28 bytes, Stack size 12 bytes, gd32f4xx_i2c.o(i.i2c_mode_addr_config))

[Stack]

• Max Depth = 12
• Call Chain = i2c_mode_addr_config

• >>   i2c2_config
• >>   i2c1_config
• >>   i2c0_config

i2c_start_on_bus (Thumb, 10 bytes, Stack size 0 bytes, gd32f4xx_i2c.o(i.i2c_start_on_bus))

[Called By]

• >>   i2c_delay_write
• >>   i2c_delay_read
• >>   i2c_delay_byte_write
• >>   i2c_cmd_write
• >>   i2c_byte_write
• >>   i2c_addr_poll

i2c_stop_on_bus (Thumb, 10 bytes, Stack size 0 bytes, gd32f4xx_i2c.o(i.i2c_stop_on_bus))

[Called By]

• >>   i2c_delay_write
• >>   i2c_delay_read
• >>   i2c_delay_byte_write
• >>   i2c_cmd_write
• >>   i2c_byte_write
• >>   i2c_addr_poll

init_i2c (Thumb, 28 bytes, Stack size 8 bytes, i2c.o(i.init_i2c))

[Stack]

• Max Depth = 140
• Call Chain = init_i2c ⇒ i2c2_config ⇒ i2c_clock_config ⇒ rcu_clock_freq_get

• >>   i2c2_gpio_config
• >>   i2c2_config
• >>   i2c1_gpio_config
• >>   i2c1_config
• >>   i2c0_gpio_config
• >>   i2c0_config

• >>   main

main (Thumb, 186 bytes, Stack size 24 bytes, main.o(i.main))

[Stack]

• Max Depth = 328
• Call Chain = main ⇒ read_time ⇒ s5_verify ⇒ PcdAuthState ⇒ PcdComMS523 ⇒ SetBitMask ⇒ i2c_delay_read ⇒ i2c_flag_get

• >>   s5_init
• >>   s5_detect
• >>   nvic_priority_group_set
• >>   init_i2c
• >>   gd_eval_com_init
• >>   e1_init
• >>   e1_digital_display
• >>   timer3_init
• >>   read_time

• entry9a.o(.ARM.Collect$$$$0000000B)

nvic_irq_enable (Thumb, 186 bytes, Stack size 24 bytes, gd32f4xx_misc.o(i.nvic_irq_enable))

[Stack]

• Max Depth = 24
• Call Chain = nvic_irq_enable

• >>   nvic_priority_group_set

• >>   timer3_init

nvic_priority_group_set (Thumb, 10 bytes, Stack size 0 bytes, gd32f4xx_misc.o(i.nvic_priority_group_set))

[Called By]

• >>   nvic_irq_enable
• >>   main

pca9685_init (Thumb, 28 bytes, Stack size 16 bytes, e1.o(i.pca9685_init))

[Stack]

• Max Depth = 64
• Call Chain = pca9685_init ⇒ set_pca9685_pwm_off ⇒ i2c_byte_write ⇒ i2c_flag_get

• >>   set_pca9685_pwm_off
• >>   i2c_delay_byte_write

• >>   e1_init

rcu_clock_freq_get (Thumb, 264 bytes, Stack size 84 bytes, gd32f4xx_rcu.o(i.rcu_clock_freq_get))

[Stack]

• Max Depth = 84
• Call Chain = rcu_clock_freq_get

• >>   i2c_clock_config
• >>   usart_baudrate_set

rcu_periph_clock_enable (Thumb, 32 bytes, Stack size 0 bytes, gd32f4xx_rcu.o(i.rcu_periph_clock_enable))

[Called By]

• >>   i2c2_gpio_config
• >>   i2c2_config
• >>   i2c1_gpio_config
• >>   i2c1_config
• >>   i2c0_gpio_config
• >>   i2c0_config
• >>   gd_eval_com_init
• >>   timer3_init

rcu_periph_reset_disable (Thumb, 32 bytes, Stack size 0 bytes, gd32f4xx_rcu.o(i.rcu_periph_reset_disable))

[Called By]

• >>   timer_deinit
• >>   usart_deinit

rcu_periph_reset_enable (Thumb, 32 bytes, Stack size 0 bytes, gd32f4xx_rcu.o(i.rcu_periph_reset_enable))

[Called By]

• >>   timer_deinit
• >>   usart_deinit

read_time (Thumb, 140 bytes, Stack size 48 bytes, main.o(i.read_time))

[Stack]

• Max Depth = 304
• Call Chain = read_time ⇒ s5_verify ⇒ PcdAuthState ⇒ PcdComMS523 ⇒ SetBitMask ⇒ i2c_delay_read ⇒ i2c_flag_get

• >>   s5_verify
• >>   s5_read_data

• >>   main

s5_detect (Thumb, 54 bytes, Stack size 24 bytes, s5.o(i.s5_detect))

[Stack]

• Max Depth = 224
• Call Chain = s5_detect ⇒ PcdSelect ⇒ PcdComMS523 ⇒ SetBitMask ⇒ i2c_delay_read ⇒ i2c_flag_get

• >>   PcdSelect
• >>   PcdRequest
• >>   PcdAnticoll

• >>   main

s5_init (Thumb, 78 bytes, Stack size 40 bytes, s5.o(i.s5_init))

[Stack]

• Max Depth = 176
• Call Chain = s5_init ⇒ Init_MFRC522 ⇒ M500PcdConfigISOType ⇒ PcdAntennaOn ⇒ SetBitMask ⇒ i2c_delay_read ⇒ i2c_flag_get

• >>   Init_MFRC522
• >>   get_board_address

• >>   main

s5_read_data (Thumb, 42 bytes, Stack size 24 bytes, s5.o(i.s5_read_data))

[Stack]

• Max Depth = 224
• Call Chain = s5_read_data ⇒ PcdRead ⇒ PcdComMS523 ⇒ SetBitMask ⇒ i2c_delay_read ⇒ i2c_flag_get

• >>   PcdRead

• >>   read_time

s5_verify (Thumb, 50 bytes, Stack size 40 bytes, s5.o(i.s5_verify))

[Stack]

• Max Depth = 256
• Call Chain = s5_verify ⇒ PcdAuthState ⇒ PcdComMS523 ⇒ SetBitMask ⇒ i2c_delay_read ⇒ i2c_flag_get

• >>   PcdAuthState

• >>   read_time

set_pca9685_pwm_off (Thumb, 56 bytes, Stack size 16 bytes, e1.o(i.set_pca9685_pwm_off))

[Stack]

• Max Depth = 48
• Call Chain = set_pca9685_pwm_off ⇒ i2c_byte_write ⇒ i2c_flag_get

• >>   i2c_byte_write

• >>   pca9685_init

timer3_init (Thumb, 80 bytes, Stack size 24 bytes, main.o(i.timer3_init))

[Stack]

• Max Depth = 48
• Call Chain = timer3_init ⇒ nvic_irq_enable

• >>   timer_interrupt_enable
• >>   timer_init
• >>   timer_enable
• >>   timer_deinit
• >>   rcu_periph_clock_enable
• >>   nvic_irq_enable

• >>   main

timer_deinit (Thumb, 374 bytes, Stack size 8 bytes, gd32f4xx_timer.o(i.timer_deinit))

[Stack]

• Max Depth = 8
• Call Chain = timer_deinit

• >>   rcu_periph_reset_enable
• >>   rcu_periph_reset_disable

• >>   timer3_init

timer_enable (Thumb, 10 bytes, Stack size 0 bytes, gd32f4xx_timer.o(i.timer_enable))

[Called By]

• >>   timer3_init

timer_init (Thumb, 122 bytes, Stack size 0 bytes, gd32f4xx_timer.o(i.timer_init))

[Called By]

• >>   timer3_init

timer_interrupt_enable (Thumb, 8 bytes, Stack size 0 bytes, gd32f4xx_timer.o(i.timer_interrupt_enable))

[Called By]

• >>   timer3_init

timer_interrupt_flag_clear (Thumb, 6 bytes, Stack size 0 bytes, gd32f4xx_timer.o(i.timer_interrupt_flag_clear))

[Called By]

• >>   TIMER3_IRQHandler

timer_interrupt_flag_get (Thumb, 24 bytes, Stack size 0 bytes, gd32f4xx_timer.o(i.timer_interrupt_flag_get))

[Called By]

• >>   TIMER3_IRQHandler

usart_baudrate_set (Thumb, 224 bytes, Stack size 32 bytes, gd32f4xx_usart.o(i.usart_baudrate_set))

[Stack]

• Max Depth = 116
• Call Chain = usart_baudrate_set ⇒ rcu_clock_freq_get

• >>   rcu_clock_freq_get

• >>   gd_eval_com_init

usart_deinit (Thumb, 210 bytes, Stack size 8 bytes, gd32f4xx_usart.o(i.usart_deinit))

[Stack]

• Max Depth = 8
• Call Chain = usart_deinit

• >>   rcu_periph_reset_enable
• >>   rcu_periph_reset_disable

• >>   gd_eval_com_init

usart_enable (Thumb, 10 bytes, Stack size 0 bytes, gd32f4xx_usart.o(i.usart_enable))

[Called By]

• >>   gd_eval_com_init

usart_receive_config (Thumb, 16 bytes, Stack size 0 bytes, gd32f4xx_usart.o(i.usart_receive_config))

[Called By]

• >>   gd_eval_com_init

usart_transmit_config (Thumb, 16 bytes, Stack size 0 bytes, gd32f4xx_usart.o(i.usart_transmit_config))

[Called By]

• >>   gd_eval_com_init

Local Symbols

system_clock_240m_25m_hxtal (Thumb, 250 bytes, Stack size 0 bytes, system_gd32f4xx.o(i.system_clock_240m_25m_hxtal))

[Called By]

• >>   system_clock_config

system_clock_config (Thumb, 8 bytes, Stack size 8 bytes, system_gd32f4xx.o(i.system_clock_config))

[Stack]

• Max Depth = 8
• Call Chain = system_clock_config

• >>   system_clock_240m_25m_hxtal

• >>   SystemInit

Undefined Global Symbols